From 03e4ccf68e2e99d2554bbef818ec7919d318c1e2 Mon Sep 17 00:00:00 2001 From: SkyratBot <59378654+SkyratBot@users.noreply.github.com> Date: Thu, 23 Sep 2021 02:47:25 +0200 Subject: [PATCH] [MIRROR] Adds a Datum port type for Admin Circuits (#8333) * Adds a Datum port type for Admin Circuits (#61582) Admin circuit components were limited in their utility due to the setvar, getvar, proccall, and signal handler components only being able to operate on atoms. I have improved them by adding the datum datatype, which is used exclusively by the aforementioned components in place of the atom datatype their target port currently uses. Furthermore, an option for the expected output type has been added to the getvar and proccall components. This option defaults to any. * Adds a Datum port type for Admin Circuits Co-authored-by: Y0SH1M4S73R --- code/__DEFINES/wiremod.dm | 2 ++ code/_globalvars/lists/wiremod.dm | 3 ++- code/modules/wiremod/components/admin/getvar.dm | 12 +++++++++++- .../wiremod/components/admin/proccall.dm | 12 +++++++++++- code/modules/wiremod/components/admin/setvar.dm | 2 +- .../admin/signal_handler/signal_handler.dm | 4 ++-- code/modules/wiremod/datatypes/datum.dm | 17 +++++++++++++++++ tgstation.dme | 1 + 8 files changed, 47 insertions(+), 6 deletions(-) create mode 100644 code/modules/wiremod/datatypes/datum.dm diff --git a/code/__DEFINES/wiremod.dm b/code/__DEFINES/wiremod.dm index 5bef0a0c363..d01fae862f9 100644 --- a/code/__DEFINES/wiremod.dm +++ b/code/__DEFINES/wiremod.dm @@ -32,6 +32,8 @@ // Other datatypes /// Atom datatype #define PORT_TYPE_ATOM "entity" +/// Datum datatype +#define PORT_TYPE_DATUM "datum" /// The maximum range between a port and an atom diff --git a/code/_globalvars/lists/wiremod.dm b/code/_globalvars/lists/wiremod.dm index 5facb57c929..716a4042283 100644 --- a/code/_globalvars/lists/wiremod.dm +++ b/code/_globalvars/lists/wiremod.dm @@ -1,4 +1,4 @@ -/// The basic types that don't have any super special behaviour. +/// The basic player-facing types that don't have any super special behaviour. GLOBAL_LIST_INIT(wiremod_basic_types, list( PORT_TYPE_ANY, PORT_TYPE_STRING, @@ -14,6 +14,7 @@ GLOBAL_LIST_INIT(wiremod_fundamental_types, list( PORT_TYPE_ANY, PORT_TYPE_NUMBER, PORT_TYPE_ATOM, + PORT_TYPE_DATUM, PORT_TYPE_STRING, PORT_TYPE_LIST, )) diff --git a/code/modules/wiremod/components/admin/getvar.dm b/code/modules/wiremod/components/admin/getvar.dm index b3aef78c792..87b26855434 100644 --- a/code/modules/wiremod/components/admin/getvar.dm +++ b/code/modules/wiremod/components/admin/getvar.dm @@ -11,19 +11,29 @@ /// Entity to get variable of var/datum/port/input/entity + /// Expected type of output + var/datum/port/input/option/expected_output_type + /// Variable name var/datum/port/input/variable_name /// Variable value var/datum/port/output/output_value +/obj/item/circuit_component/get_variable/populate_options() + expected_output_type = add_option_port("Expected Output Type", GLOB.wiremod_fundamental_types) /obj/item/circuit_component/get_variable/populate_ports() - entity = add_input_port("Target", PORT_TYPE_ATOM) + entity = add_input_port("Target", PORT_TYPE_DATUM) variable_name = add_input_port("Variable Name", PORT_TYPE_STRING) output_value = add_output_port("Output Value", PORT_TYPE_ANY) +/obj/item/circuit_component/get_variable/pre_input_received(datum/port/input/port) + if(port == expected_output_type) + if(output_value.datatype != expected_output_type.value) + output_value.set_datatype(expected_output_type.value) + /obj/item/circuit_component/get_variable/input_received(datum/port/input/port) var/atom/object = entity.value var/var_name = variable_name.value diff --git a/code/modules/wiremod/components/admin/proccall.dm b/code/modules/wiremod/components/admin/proccall.dm index 6a991564bca..87e6c1369af 100644 --- a/code/modules/wiremod/components/admin/proccall.dm +++ b/code/modules/wiremod/components/admin/proccall.dm @@ -14,6 +14,9 @@ var/datum/port/input/option/proccall_options + /// Expected type of output + var/datum/port/input/option/expected_output_type + /// Entity to proccall on var/datum/port/input/entity @@ -34,13 +37,20 @@ proccall_options = add_option_port("Proccall Options", component_options) + expected_output_type = add_option_port("Expected Output Type", GLOB.wiremod_fundamental_types) + /obj/item/circuit_component/proccall/populate_ports() - entity = add_input_port("Target", PORT_TYPE_ATOM) + entity = add_input_port("Target", PORT_TYPE_DATUM) proc_name = add_input_port("Proc Name", PORT_TYPE_STRING) arguments = add_input_port("Arguments", PORT_TYPE_LIST) output_value = add_output_port("Output Value", PORT_TYPE_ANY) +/obj/item/circuit_component/proccall/pre_input_received(datum/port/input/port) + if(port == expected_output_type) + if(output_value.datatype != expected_output_type.value) + output_value.set_datatype(expected_output_type.value) + /obj/item/circuit_component/proccall/input_received(datum/port/input/port) var/called_on if(proccall_options.value == COMP_PROC_OBJECT) diff --git a/code/modules/wiremod/components/admin/setvar.dm b/code/modules/wiremod/components/admin/setvar.dm index 32c5d03147e..3ddf4f5e2aa 100644 --- a/code/modules/wiremod/components/admin/setvar.dm +++ b/code/modules/wiremod/components/admin/setvar.dm @@ -19,7 +19,7 @@ /obj/item/circuit_component/set_variable/populate_ports() - entity = add_input_port("Target", PORT_TYPE_ATOM) + entity = add_input_port("Target", PORT_TYPE_DATUM) variable_name = add_input_port("Variable Name", PORT_TYPE_STRING) new_value = add_input_port("New Value", PORT_TYPE_ANY) diff --git a/code/modules/wiremod/components/admin/signal_handler/signal_handler.dm b/code/modules/wiremod/components/admin/signal_handler/signal_handler.dm index 0309f567986..a274abbc40c 100644 --- a/code/modules/wiremod/components/admin/signal_handler/signal_handler.dm +++ b/code/modules/wiremod/components/admin/signal_handler/signal_handler.dm @@ -69,8 +69,8 @@ if(entity) remove_output_port(entity) - target = add_input_port("Target", PORT_TYPE_ATOM, order = 1, trigger = null) - entity = add_output_port("Source Entity", PORT_TYPE_ATOM, order = 0) + target = add_input_port("Target", PORT_TYPE_DATUM, order = 1, trigger = null) + entity = add_output_port("Source Entity", PORT_TYPE_DATUM, order = 0) /obj/item/circuit_component/signal_handler/save_data_to_list(list/component_data) . = ..() diff --git a/code/modules/wiremod/datatypes/datum.dm b/code/modules/wiremod/datatypes/datum.dm new file mode 100644 index 00000000000..3deb84a9de2 --- /dev/null +++ b/code/modules/wiremod/datatypes/datum.dm @@ -0,0 +1,17 @@ +/datum/circuit_datatype/datum + datatype = PORT_TYPE_DATUM + color = "yellow" + datatype_flags = DATATYPE_FLAG_ALLOW_MANUAL_INPUT + +/datum/circuit_datatype/datum/can_receive_from_datatype(datatype_to_check) + . = ..() + if(.) + return + + return datatype_to_check == PORT_TYPE_ATOM + +/datum/circuit_datatype/datum/convert_value(datum/port/port, value_to_convert) + var/datum/object = value_to_convert + if(QDELETED(object)) + return null + return object diff --git a/tgstation.dme b/tgstation.dme index 0ba1596b734..5bc1bde5bcc 100644 --- a/tgstation.dme +++ b/tgstation.dme @@ -3929,6 +3929,7 @@ #include "code\modules\wiremod\core\variable.dm" #include "code\modules\wiremod\datatypes\any.dm" #include "code\modules\wiremod\datatypes\basic.dm" +#include "code\modules\wiremod\datatypes\datum.dm" #include "code\modules\wiremod\datatypes\entity.dm" #include "code\modules\wiremod\datatypes\number.dm" #include "code\modules\wiremod\datatypes\option.dm"