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[MIRROR] Refactors how components are triggered and refactors how ports are ordered (#7951)

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* Refactors how components are triggered and refactors how ports are ordered (#60934)

Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>

* Refactors how components are triggered and refactors how ports are ordered

Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
This commit is contained in:
SkyratBot
2021-09-03 14:02:48 +01:00
committed by GitHub
co-authored by Watermelon914 Watermelon914
parent 94bc4b3a6a
commit af8c0d2977
76 changed files with 265 additions and 429 deletions
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code/modules/wiremod/components/string/concat.dm
+5 -10
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@@ -10,28 +10,23 @@
/// The amount of input ports to have
var/input_port_amount = 4
var/list/datum/port/input/concat_ports = list()
/// The result from the output
var/datum/port/output/output
circuit_flags = CIRCUIT_FLAG_INPUT_SIGNAL|CIRCUIT_FLAG_OUTPUT_SIGNAL
/obj/item/circuit_component/concat/Initialize()
. = ..()
/obj/item/circuit_component/concat/populate_ports()
for(var/port_id in 1 to input_port_amount)
var/letter = ascii2text(text2ascii("A") + (port_id-1))
add_input_port(letter, PORT_TYPE_STRING)
concat_ports += add_input_port(letter, PORT_TYPE_STRING)
output = add_output_port("Output", PORT_TYPE_STRING)
/obj/item/circuit_component/concat/input_received(datum/port/input/port)
. = ..()
if(.)
return
var/result = ""
var/list/ports = input_ports.Copy()
ports -= trigger_input
for(var/datum/port/input/input_port as anything in ports)
for(var/datum/port/input/input_port as anything in concat_ports)
var/value = input_port.value
if(isnull(value))
continue