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Input ports now connect to multiple output ports. Remove combiner. (#60494)

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* tgui bsod

* debug disconnections

* prelim

* recomment

* set_value -> put ._.

* DAMN IT

* reinsert subsystem

* prepare

* unditch signals

* remove combiner

* remove combiner some more

* how did router.dm get here? deleting.

* These two COMSIGS should be one.

* critical typo

* inline cast

* have your signals

* Have your set_input & set_output.

* make compile

* upgrade save/load to n-to-n-wires

* have your documentation

* have your unsafe proc

* pay no attention to the compile errors

* unlist the ref

* paste my for block back in ._.

* fix manual input

* oops pushed too soon

* Have your !port.connected_to?.length

Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>

Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
This commit is contained in:
Gurkenglas
2021-08-11 17:48:29 +02:00
committed by GitHub
parent e64b101750
commit e0fad671fd
66 changed files with 280 additions and 386 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
code/modules/wiremod/components/math/arithmetic.dm
View File

@@ -53,14 +53,14 @@
var/list/ports = arithmetic_ports.Copy()
var/datum/port/input/first_port = popleft(ports)
var/result = first_port.input_value
var/result = first_port.value
for(var/datum/port/input/input_port as anything in ports)
var/value = input_port.input_value
var/value = input_port.value
if(isnull(value))
continue
switch(arithmetic_option.input_value)
switch(arithmetic_option.value)
if(COMP_ARITHMETIC_ADD)
result += value
if(COMP_ARITHMETIC_SUBTRACT)

8
code/modules/wiremod/components/math/comparison.dm
View File

@@ -24,7 +24,7 @@
comparison_option = add_option_port("Comparison Option", component_options)
/obj/item/circuit_component/compare/comparison/input_received(datum/port/input/port)
switch(comparison_option.input_value)
switch(comparison_option.value)
if(COMP_COMPARISON_EQUAL, COMP_COMPARISON_NOT_EQUAL)
if(current_type != PORT_TYPE_ANY)
current_type = PORT_TYPE_ANY
@@ -43,9 +43,9 @@
return FALSE
// Comparison component only compares the first two ports
var/input1 = compare_ports[1].input_value
var/input2 = compare_ports[2].input_value
var/current_option = comparison_option.input_value
var/input1 = compare_ports[1].value
var/input2 = compare_ports[2].value
var/current_option = comparison_option.value
switch(current_option)
if(COMP_COMPARISON_EQUAL)

2
code/modules/wiremod/components/math/length.dm
View File

@@ -25,5 +25,5 @@
if(.)
return
output.set_output(length(input_port.input_value))
output.set_output(length(input_port.value))

10
code/modules/wiremod/components/math/logic.dm
View File

@@ -23,26 +23,26 @@
/obj/item/circuit_component/compare/logic/do_comparisons(list/ports)
. = FALSE
var/current_option = logic_options.input_value
var/current_option = logic_options.value
// Used by XOR
var/total_ports = 0
var/total_true_ports = 0
for(var/datum/port/input/port as anything in ports)
if(isnull(port.input_value) && isnull(port.connected_port))
if(isnull(port.value) && length(port.connected_ports) == 0)
continue
total_ports += 1
switch(current_option)
if(COMP_LOGIC_AND)
if(!port.input_value)
if(!port.value)
return FALSE
. = TRUE
if(COMP_LOGIC_OR)
if(port.input_value)
if(port.value)
return TRUE
if(COMP_LOGIC_XOR)
if(port.input_value)
if(port.value)
. = TRUE
total_true_ports += 1

2
code/modules/wiremod/components/math/not.dm
View File

@@ -25,5 +25,5 @@
if(.)
return
result.set_output(!input_port.input_value)
result.set_output(!input_port.value)

4
code/modules/wiremod/components/math/random.dm
View File

@@ -29,8 +29,8 @@
if(.)
return
var/min_val = minimum.input_value || 0
var/max_val = maximum.input_value || 0
var/min_val = minimum.value || 0
var/max_val = maximum.value || 0
if(max_val < min_val)
output.set_output(0)