Commit Graph

18 Commits

Author SHA1 Message Date
Watermelon914
9450605495 Adds basic list manipulation and fixes some performance issues with lists in integrated circuits (#64541)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2022-02-04 13:41:53 -08:00
Y0SH1M4S73R
db94f78511 MODsuit Action Circuit Component (+ MODsuit circuit module fixes) (#63755)
This makes several small changes to the MODsuit circuit module:

Adds the MODsuit Action component. When selected, the circuit module opens a radial menu with which to select an action component to trigger.
Due to its similarity to the BCI Action component, both it and the BCI Action component have been made subtypes of an abstract equipment_action component that implements their shared functionality.
Renames the MOD component to the MOD circuit adapter core component.
Changes the "selected module" port on the MOD circuit adapter core to a string port, for consistency with the corresponding input port.
The circuit in the circuit module can be removed. Consequentually, the circuit module no longer comes with a pre-installed circuit.
The "Toggle Suit" signal port on the MOD circuit adapter core can now activate the modsuit.
Makes the circuit module printable in the component printer, for consistency.
Moves the circuit module's code to modules/wiremod, for consistency.
BCI action component properly typechecks the shell it's inserted in.
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
2022-01-25 22:54:08 +00:00
Watermelon914
44a2af780d Integrated the component printer into the integrated circuit UI. You can now link integrated circuits to component printers (#62287)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2021-10-28 11:42:57 -07:00
Ghom
585f1119e3 Binary and Decimal Conversion Components. (#61889)
Added a couple components that convert a number into an array of binary digits and viceversa.
May help players mak more complex and advanced components without filtering those lacking knowledge in the binary field.
2021-10-23 08:03:26 +01:00
Ghom
b78b9fde74 Adds the CIRCUIT_FLAG_REFUSE_MODULE circuit flag. (#62033)
Components like the MMI one can't be added to circuits more than once since they may register signals with same proctype and similar things which make for some tangled up race conditions if more than one is present.
Unfortunately this safety can be bypassed - with little gain alas, an MMI can't be inserted by attacking the component with it. it needs a shell - by using a module component. That's no good. So I'm adding a flag that can be used to stop certain components from being added to module components.
2021-10-11 19:28:08 +01:00
Watermelon914
d15b305527 Refactors the list datatype to support composite lists. Adapts a lot of circuits to be able to properly use composite lists. Adds the dispenser shell (#61856)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
Co-authored-by: Colovorat <35225170+Colovorat@users.noreply.github.com>
2021-10-06 22:51:36 -07:00
Watermelon914
1a507d23ed Refactors how circuit size is calculated. Fixed module circuit size not taking up capacity equal to the amount of circuit components inside of it. (#61554)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2021-09-30 11:09:42 -07:00
Watermelon914
390f60f571 Adds buttons in the UI for specific components (#61622)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2021-09-25 03:50:15 -07:00
tralezab
6c01cc2c01 every case of initialize that should have mapload, does (#61623)
## About The Pull Request

stop forgetting to include mapload, if you don't include it then every single subtype past it by default doesn't include it

for example, `obj/item` didn't include mapload so every single item by default didn't fill in mapload

![](https://media.discordapp.net/attachments/823293417186000909/875122648605147146/image0.gif)

## Regex used:

procs without args, not even regex

`/Initialize()`

procs with args
`\/Initialize\((?!mapload)((.)*\w)?`

cleanup of things i didn't want to mapload:
`\/datum\/(.)*\/Initialize\(mapload`
2021-09-24 17:56:50 -04:00
Watermelon914
126411f405 Refactors how components are triggered and refactors how ports are ordered (#60934)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2021-09-03 02:22:39 -07:00
Watermelon914
05ede8dc30 Adds Circuit variables (#60590)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2021-08-12 18:30:50 -07:00
Gurkenglas
e0fad671fd Input ports now connect to multiple output ports. Remove combiner. (#60494)
* tgui bsod

* debug disconnections

* prelim

* recomment

* set_value -> put ._.

* DAMN IT

* reinsert subsystem

* prepare

* unditch signals

* remove combiner

* remove combiner some more

* how did router.dm get here? deleting.

* These two COMSIGS should be one.

* critical typo

* inline cast

* have your signals

* Have your set_input & set_output.

* make compile

* upgrade save/load to n-to-n-wires

* have your documentation

* have your unsafe proc

* pay no attention to the compile errors

* unlist the ref

* paste my for block back in ._.

* fix manual input

* oops pushed too soon

* Have your !port.connected_to?.length

Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>

Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
2021-08-11 18:48:29 +03:00
Watermelon914
13296f5f74 Refactors port types completely and adds the option type. Refactors options to use this new type (#60571)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2021-08-04 09:06:48 -07:00
Gurkenglas
aa018a857a Circuit component descriptions and module names are now visible to the naked eye. (#60545) 2021-07-31 21:19:43 -07:00
Watermelon914
ac2efd9b86 Removes Destroy overrides from most circuit components (#60492)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2021-07-28 18:31:42 -07:00
Watermelon914
548f924c21 Adds the ability to save/load circuits for admins. Adds the ability to duplicate modules in a round. (#60222)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
2021-07-28 14:26:50 -07:00
Watermelon914
5a21e2e64c Circuit submodules (#60109)
Adds the module component that is basically a subroutine. Allows you to compact your logic into a bunch of functions.
2021-07-17 01:05:57 -03:00
Watermelon914
b84a9f97b2 Integrated Circuits (Wiremod) (#59232)
Co-authored-by: Watermelon914 <3052169-Watermelon914@users.noreply.gitlab.com>
Co-authored-by: Mothblocks <35135081+Mothblocks@users.noreply.github.com>
Co-authored-by: ATH1909 <42606352+ATH1909@users.noreply.github.com>
Co-authored-by: Maurukas <66576896+Maurukas@users.noreply.github.com>
2021-05-25 11:15:36 -07:00