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S.P.L.U.R.T-Station-13/code/modules/wiremod/components/math/not.dm
2021-10-28 12:51:31 +08:00

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/**
* # Logic Component
*
* General logic unit with AND OR capabilities
*/
/obj/item/circuit_component/not
display_name = "Not"
desc = "A component that inverts its input."
/// The input port
var/datum/port/input/input_port
/// The result from the output
var/datum/port/output/result
circuit_flags = CIRCUIT_FLAG_INPUT_SIGNAL|CIRCUIT_FLAG_OUTPUT_SIGNAL
/obj/item/circuit_component/not/Initialize()
. = ..()
input_port = add_input_port("Input", PORT_TYPE_ANY)
result = add_output_port("Result", PORT_TYPE_NUMBER)
/obj/item/circuit_component/not/input_received(datum/port/input/port)
. = ..()
if(.)
return
result.set_output(!input_port.value)