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SandPoot
2022-04-06 18:41:31 -03:00
parent 4c3fa08cdf
commit 586a035132
881 changed files with 1599 additions and 1599 deletions
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code/modules/wiremod/components/list/concat.dm
+1 -1
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@@ -17,7 +17,7 @@
var/datum/port/output/output
circuit_flags = CIRCUIT_FLAG_INPUT_SIGNAL|CIRCUIT_FLAG_OUTPUT_SIGNAL
/obj/item/circuit_component/concat_list/Initialize()
/obj/item/circuit_component/concat_list/Initialize(mapload)
. = ..()
list_port = add_input_port("List", PORT_TYPE_LIST)
separator = add_input_port("Seperator", PORT_TYPE_STRING)
code/modules/wiremod/components/list/get_column.dm
+1 -1
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@@ -17,7 +17,7 @@
/// The filtered list
var/datum/port/output/output_list
/obj/item/circuit_component/get_column/Initialize()
/obj/item/circuit_component/get_column/Initialize(mapload)
. = ..()
received_table = add_input_port("Input", PORT_TYPE_TABLE)
column_name = add_input_port("Column Name", PORT_TYPE_STRING)
code/modules/wiremod/components/list/index.dm
+1 -1
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@@ -15,7 +15,7 @@
var/datum/port/output/output
circuit_flags = CIRCUIT_FLAG_INPUT_SIGNAL|CIRCUIT_FLAG_OUTPUT_SIGNAL
/obj/item/circuit_component/index/Initialize()
/obj/item/circuit_component/index/Initialize(mapload)
. = ..()
index_port = add_input_port("Index", PORT_TYPE_ANY)
list_port = add_input_port("List", PORT_TYPE_LIST)
code/modules/wiremod/components/list/index_table.dm
+1 -1
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@@ -17,7 +17,7 @@
/// The filtered list
var/datum/port/output/output_list
/obj/item/circuit_component/index_table/Initialize()
/obj/item/circuit_component/index_table/Initialize(mapload)
. = ..()
received_table = add_input_port("Input", PORT_TYPE_TABLE)
target_index = add_input_port("Index", PORT_TYPE_NUMBER)
code/modules/wiremod/components/list/list_literal.dm
+1 -1
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@@ -51,7 +51,7 @@
index -= 1
entry_ports += add_input_port("Index [index+1]", PORT_TYPE_ANY, index = index+1)
/obj/item/circuit_component/list_literal/Initialize()
/obj/item/circuit_component/list_literal/Initialize(mapload)
. = ..()
set_list_size(default_list_size)
list_output = add_output_port("Value", PORT_TYPE_LIST)
code/modules/wiremod/components/list/select.dm
+1 -1
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@@ -35,7 +35,7 @@
)
comparison_options = add_option_port("Comparison Options", component_options)
/obj/item/circuit_component/select/Initialize()
/obj/item/circuit_component/select/Initialize(mapload)
. = ..()
received_table = add_input_port("Input", PORT_TYPE_TABLE)
column_name = add_input_port("Column Name", PORT_TYPE_STRING)
code/modules/wiremod/components/list/split.dm
+1 -1
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@@ -18,7 +18,7 @@
circuit_flags = CIRCUIT_FLAG_INPUT_SIGNAL|CIRCUIT_FLAG_OUTPUT_SIGNAL
/obj/item/circuit_component/split/Initialize()
/obj/item/circuit_component/split/Initialize(mapload)
. = ..()
input_port = add_input_port("Input", PORT_TYPE_STRING)
separator = add_input_port("Seperator", PORT_TYPE_STRING)