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[READY]integrated circuitry port+upgrade.

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This commit is contained in:
arsserpentarium
2017-11-14 12:05:22 +03:00
committed by CitadelStationBot
parent 4afc4f5b39
commit d8847ea167
61 changed files with 6933 additions and 9 deletions
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code/modules/research/designs/telecomms_designs.dm
+8
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@@ -10,6 +10,14 @@
build_path = /obj/item/circuitboard/machine/telecomms/receiver
category = list("Subspace Telecomms")
/datum/design/board/exonet_node
name = "Machine Design (Exonet Node)"
desc = "Allows for the construction of Exonet Node."
id = "e-node"
req_tech = list("programming" = 2, "engineering" = 3, "bluespace" = 1)
build_path = /obj/item/circuitboard/machine/exonet_node
category = list("Subspace Telecomms")
/datum/design/board/telecomms_bus
name = "Machine Design (Bus Mainframe)"
desc = "Allows for the construction of Telecommunications Bus Mainframes."