* Integrated the component printer into the integrated circuit UI. You can now link integrated circuits to component printers (#62287)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Integrated the component printer into the integrated circuit UI. You can now link integrated circuits to component printers
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Adds the CIRCUIT_FLAG_REFUSE_MODULE circuit flag. (#62033)
Components like the MMI one can't be added to circuits more than once since they may register signals with same proctype and similar things which make for some tangled up race conditions if more than one is present.
Unfortunately this safety can be bypassed - with little gain alas, an MMI can't be inserted by attacking the component with it. it needs a shell - by using a module component. That's no good. So I'm adding a flag that can be used to stop certain components from being added to module components.
* Adds the CIRCUIT_FLAG_REFUSE_MODULE circuit flag.
Co-authored-by: Ghom <42542238+Ghommie@users.noreply.github.com>
* Refactors how circuit size is calculated. Fixed module circuit size not taking up capacity equal to the amount of circuit components inside of it. (#61554)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Refactors how circuit size is calculated. Fixed module circuit size not taking up capacity equal to the amount of circuit components inside of it.
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Adds buttons in the UI for specific components (#61622)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Adds buttons in the integrated circuit UI for specific circuit components
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Refactors how components are triggered and refactors how ports are ordered (#60934)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Refactors how components are triggered and refactors how ports are ordered
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Input ports now connect to multiple output ports. Remove combiner. (#60494)
* tgui bsod
* debug disconnections
* prelim
* recomment
* set_value -> put ._.
* DAMN IT
* reinsert subsystem
* prepare
* unditch signals
* remove combiner
* remove combiner some more
* how did router.dm get here? deleting.
* These two COMSIGS should be one.
* critical typo
* inline cast
* have your signals
* Have your set_input & set_output.
* make compile
* upgrade save/load to n-to-n-wires
* have your documentation
* have your unsafe proc
* pay no attention to the compile errors
* unlist the ref
* paste my for block back in ._.
* fix manual input
* oops pushed too soon
* Have your !port.connected_to?.length
Co-authored-by: Watermelon914 <37270891+Watermelon914@ users.noreply.github.com>
Co-authored-by: Watermelon914 <37270891+Watermelon914@ users.noreply.github.com>
* Input ports now connect to multiple output ports. Remove combiner.
Co-authored-by: Gurkenglas <gurkenglas@hotmail.de>
Co-authored-by: Watermelon914 <37270891+Watermelon914@ users.noreply.github.com>
* Circuit component descriptions and module names are now visible to the naked eye. (#60545)
* Circuit component descriptions and module names are now visible to the naked eye.
Co-authored-by: Gurkenglas <gurkenglas@hotmail.de>
* Adds the ability to save/load circuits for admins. Adds the ability to duplicate modules in a round. (#60222)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Adds the ability to save/load circuits for admins. Adds the ability to duplicate modules in a round.
* a
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
Co-authored-by: Gandalf <jzo123@hotmail.com>
* Circuit submodules (#60109)
Adds the module component that is basically a subroutine. Allows you to compact your logic into a bunch of functions.
* Circuit submodules
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
