* Refactored fundamental circuit components that have varying inputs. Improvements to the integrated circuit UI. Improves and rebalances the drone shell (#68586)
* Refactored fundamental circuit components that have varying inputs. Made the integrated circuit UI slightly better.
* Fixes with UI
* Removes logger
* Ran prettier
* Fixed documentation
* Rebalances drone circuit
* Drones can now charge in chargers
Co-authored-by: Watermelon914 <hidden@ hidden.com>
* Refactored fundamental circuit components that have varying inputs. Improvements to the integrated circuit UI. Improves and rebalances the drone shell
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <hidden@ hidden.com>
* Integrated the component printer into the integrated circuit UI. You can now link integrated circuits to component printers (#62287)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Integrated the component printer into the integrated circuit UI. You can now link integrated circuits to component printers
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* timepiece circuit module (#62039)
Adds a circuit component that outputs the station time in chosen format and unit of time when triggered. The options are currently 24-hour and 12-hour for the time format, hours, minutes and seconds for the unit of time.
The component is called timepiece because clock was already taken by another component that sends signal outputs at intervals.
* timepiece circuit module
Co-authored-by: Ghom <42542238+Ghommie@users.noreply.github.com>
* Refactors the list datatype to support composite lists. Adapts a lot of circuits to be able to properly use composite lists. Adds the dispenser shell (#61856)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
Co-authored-by: Colovorat <35225170+Colovorat@ users.noreply.github.com>
* Refactors the list datatype to support composite lists. Adapts a lot of circuits to be able to properly use composite lists. Adds the dispenser shell
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
Co-authored-by: Colovorat <35225170+Colovorat@ users.noreply.github.com>
* Refactors how circuit size is calculated. Fixed module circuit size not taking up capacity equal to the amount of circuit components inside of it. (#61554)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Refactors how circuit size is calculated. Fixed module circuit size not taking up capacity equal to the amount of circuit components inside of it.
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Adds the interrupt signal to the delay component, reorganises BCI files and circuit code improvements (#61393)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Adds the interrupt signal to the delay component, reorganises BCI files and circuit code improvements
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Refactors how components are triggered and refactors how ports are ordered (#60934)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Refactors how components are triggered and refactors how ports are ordered
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Input ports now connect to multiple output ports. Remove combiner. (#60494)
* tgui bsod
* debug disconnections
* prelim
* recomment
* set_value -> put ._.
* DAMN IT
* reinsert subsystem
* prepare
* unditch signals
* remove combiner
* remove combiner some more
* how did router.dm get here? deleting.
* These two COMSIGS should be one.
* critical typo
* inline cast
* have your signals
* Have your set_input & set_output.
* make compile
* upgrade save/load to n-to-n-wires
* have your documentation
* have your unsafe proc
* pay no attention to the compile errors
* unlist the ref
* paste my for block back in ._.
* fix manual input
* oops pushed too soon
* Have your !port.connected_to?.length
Co-authored-by: Watermelon914 <37270891+Watermelon914@ users.noreply.github.com>
Co-authored-by: Watermelon914 <37270891+Watermelon914@ users.noreply.github.com>
* Input ports now connect to multiple output ports. Remove combiner.
Co-authored-by: Gurkenglas <gurkenglas@hotmail.de>
Co-authored-by: Watermelon914 <37270891+Watermelon914@ users.noreply.github.com>
* Moves most circuit defines to files (#60705)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Moves most circuit component defines to files to reduce the amount of scattered code.
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Refactors port types completely and adds the option type. Refactors options to use this new type (#60571)
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Refactors port types completely and adds the option type. Refactors options to use this new type
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
Co-authored-by: Watermelon914 <3052169-Watermelon914@ users.noreply.gitlab.com>
* Circuit component descriptions and module names are now visible to the naked eye. (#60545)
* Circuit component descriptions and module names are now visible to the naked eye.
Co-authored-by: Gurkenglas <gurkenglas@hotmail.de>
* RAM now has an option to select between types. Refactored the any type to be more friendly with circuit code. (#59953)
RAM now has an option to select between types and an output signal. Refactored the any type to be more friendly with user displays.
Code that includes changing type is no longer hard to read because of snowflake code for the "any" type.
RAM can now more easily act as a constant value component.
RAM also has an output signal because it should and the fact that it doesn't was an oversight when converting everything to use input and output signals.
* RAM now has an option to select between types. Refactored the any type to be more friendly with circuit code.
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
* Added circuit component UI details, added multiplexer and allowed inserting components directly into shells. (#59635)
Adds the multiplexer circuit component - en.wikipedia.org/wiki/Multiplexer
Circuit components can now be directly inserted into shells rather than having to take the integrated circuit out.
Special information can be accessed from components now through the "Info" button besides the eject button on a component.
* Added circuit component UI details, added multiplexer and allowed inserting components directly into shells.
Co-authored-by: Watermelon914 <37270891+Watermelon914@users.noreply.github.com>
