cyberpresidentvanellope/Citadel-Station-13-RP
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4 Commits
Author SHA1 Message Date
siliconsandGitHub ed13d94b40 processing subsystem update (#7489) 
- processing subsystems now declare time as second intervals
- adds missing stat tag
- MC now respects abstract type for subsystems (even if we don't use it
lol)
 2026-01-17 00:52:42 +00:00
siliconsandGitHub 9d6a141e5b mc update: init stages, better subsystem init tracking, etc (#6857) 
modifies the hollow metrics API; that'll probably be implemented soon
adds init stages
changes SSatoms to not abuse its `initialized` variable

closes #6858
 2024-11-15 14:41:25 -07:00
NiezanandGitHub adca169560 non standard circuit support (#6614) 2024-07-23 21:28:16 +02:00
lingonberry1234GitHubZandario
 		bfdff29d92 Circuits port plus (#4152) 
* initial

* gitignore

* oopsie

* another quick fix for dumb mistake

* Update code/modules/integrated_electronics/core/assemblies.dm

Co-authored-by: Zandario <zandarioh@gmail.com>

* formatting update

* dumb whoops fix

* com,ment formattin,g ftw (aka
commas eating code)

* bugfix (text2path != text2num)

* bugfix tgui

* fix

* fixes

Co-authored-by: Zandario <zandarioh@gmail.com>
 2022-06-09 13:49:01 -07:00